Conventionally, it has been performed to form a wiring in a fine wiring groove, a hole, or a resist opening part provided on a surface of a substrate such as semiconductor wafer, and to form a bump, i.e. a projected electrode, which is configured to electrically connected to parts such as an electrode packaged on the surface of a substrate such as semiconductor wafer. In general, as a method for forming the wiring and the bump, an electrolytic plating method (in other words, electroplating method), a deposition method, a printing method, a ball bump method and other methods have been known, the electroplating method in which miniaturization can be made and in which performance is comparatively stable has been increasingly used for the purpose of forming the wiring and the bump on the substrate to be used in manufacturing a semiconductor chip with the increased number of I/O and the narrower pitch.
Concave portions are formed in a substrate, on which a plated metal layer is formed by the electrolytic plating method, by forming patterns on a resist provided on a surface of the substrate. The concave portions are arrayed on the substrate in a grid shape, and one of the grids is called a die. Since the dies are formed on the circular substrate in the grid shape, they are not evenly arrayed. Namely, a region in which the dies are not formed is present near an outer periphery of the substrate. In addition, when an identification number for identifying the substrate has been printed on the substrate, the patterns, or the dies, are not formed on a portion on which the identification number has been printed, either (i.e., the portion on which the identification number has been printed is covered with the resist).
When metal is deposited in the concave portions in the patterns of the resist by electrolytic plating to thereby form bumps etc., the bumps are not formed at a portion on the substrate completely covered with the resist, and thus metal ions corresponding to the portion completely covered with the resist gather in the dies adjacent to the portion in which the patterns are not formed on the resist (the portion completely covered with the resist). For this reason, since the metal ions in a plating liquid gather more easily in the dies adjacent to the portion in which the patterns are not formed on the resist compared with in the other dies (for example, a die located in a center of the substrate), bump heights of the dies are higher than those of the other dies. Hereby, since uniformity of a metal layer thickness plated on a substrate surface deteriorates, the number of superior dies is decreased, and the substrate itself may become scrap depending on a case. Accordingly, it has been required that the bump heights and wiring thicknesses of the dies adjacent to the portion in which the patterns are not formed on the resist are suppressed.
By the way, conventionally, it has been known to provide a shielding plate near an energization pin of a plating jig in order to suppress a plated metal layer thickness of a portion at which the energization pin for energizing a wafer is arranged from becoming thick in forming a plated layer on the wafer (refer to Patent Literature 1).